publication order number: MMFT960t1/d ? semiconductor components industries, llc, 2000 november, 2000 rev. 4 1 MMFT960t1 preferred device power mosfet 300 ma, 60 volts nchannel sot223 this power mosfet is designed for high speed, low loss power switching applications such as switching regulators, dcdc converters, solenoid and relay drivers. the device is housed in the sot223 package which is designed for medium power surface mount applications. ? silicon gate for fast switching speeds ? low drive requirement ? the sot223 package can be soldered using wave or reflow. the formed leads absorb thermal stress during soldering eliminating the possibility of damage to the die. maximum ratings (t c = 25 c unless otherwise noted) rating symbol value unit draintosource voltage v ds 60 volts gatetosource voltage nonrepetitive v gs 30 volts drain current i d 300 madc total power dissipation @ t a = 25 c (note 1.) derate above 25 c p d 0.8 6.4 watts mw/ c operating and storage temperature range t j , t stg 65 to 150 c thermal characteristics thermal resistance junctiontoambient r q ja 156 c/w maximum temperature for soldering purposes time in solder bath t l 260 10 c sec 1. device mounted on a fr4 glass epoxy printed circuit board using minimum recommended footprint. 300 ma 60 volts r ds(on) = 1.7 d g s 1 2 3 4 nchannel device package shipping ordering information MMFT960t1 sot223 1000 tape & reel to261aa case 318e style 3 http://onsemi.com lww marking diagram ft960 l = location code ww = work week pin assignment preferred devices are recommended choices for future use and best overall value. 3 2 1 4 gate drain source drain
MMFT960t1 http://onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics draintosource breakdown voltage (v gs = 0, i d = 10 m a) v (br)dss 60 vdc zero gate voltage drain current (v ds = 60 v, v gs = 0) i dss 10 m adc gatebody leakage current (v gs = 15 vdc, v ds = 0) i gss 50 nadc on characteristics (note 2.) gate threshold voltage (v ds = v gs , i d = 1.0 madc) v gs(th) 1.0 3.5 vdc static draintosource onresistance (v gs = 10 vdc, i d = 1.0 a) r ds(on) 1.7 ohms draintosource onvoltage (v gs = 10 v, i d = 0.5 a) (v gs = 10 v, i d = 1.0 a) v ds(on) 0.8 1.7 vdc forward transconductance (v ds = 25 v, i d = 0.5 a) g fs 600 mmhos dynamic characteristics input capacitance (v 25 v v 0 c iss 65 pf output capacitance (v ds = 25 v, v gs = 0, f = 1.0 mhz ) c oss 33 transfer capacitance f = 1 . 0 mhz) c rss 7.0 total gate charge (v 10v i 10a q g 3.2 nc gatesource charge (v gs = 10 v, i d = 1.0 a, v ds = 48 v ) q gs 1.2 gatedrain charge v ds = 48 v) q gd 2.0 2. pulse test: pulse width 300 m s, duty cycle 2.0%. typical electrical characteristics figure 1. onregion characteristics figure 2. transfer characteristics 5 4 3 2 1 0 10 8 6 4 2 0 v ds , drain-to-source voltage (volts) i d , drain current (amps) 4 v v gs = 10 v 1 v gs , gate-to-source voltage (volts) i d , drain current (amps) 0 10 8 6 4 2 0 t j = -55 c t j = 25 c 5 v 6 v 7 v 0.8 0.6 0.4 0.2 v ds = 10 v t j = 125 c 8 v t j = 25 c
MMFT960t1 http://onsemi.com 3 typical electrical characteristics 5 0 0.5 0 -55 c 25 c 4 3 2 1 v gs = 10 v t j = 125 c r ds(on) , drain-source resistance (ohms) figure 3. onresistance versus drain current i d , drain current (amps) 1 1.5 2 2.5 10 1 0.1 -75 -50 -25 0 25 50 75 100 125 150 figure 4. onresistance variation with temperature t j , junction temperature ( c) r ds(on) , drain-source resistance (normalize d i d , drain current (amps) 1 0.1 0 v sd , source-drain diode forward voltage (volts) 0.3 0.6 0.9 1.2 1.5 figure 5. sourcedrain diode forward voltage t j = 125 c i d = 1 a v gs = 10 v 250 200 150 100 50 0 0 5 10 15 20 25 30 v ds , drain-source voltage (volts) figure 6. capacitance variation c, capacitance (pf) v gs = 0 v f = 1 mhz t j = 25 c c iss c oss c rss v gs , gate-to-source voltage (volts) g fs , transconductance (mhos) 10 9 8 7 6 5 4 3 2 1 0 0 0.5 1 1.5 2 2.5 3 3.5 4 2 1.5 1 0.5 0 0.5 0 1 1.5 2 2.5 q g , total gate charge (nc) figure 7. gate charge versus gatetosource voltage i d , drain current (amps) figure 8. transconductance v ds = 10 v t j = -55 c 125 c 25 c t j = 25 c 225 175 125 75 25 i d = 1 a t j = 25 c v ds = 30 v v ds = 48 v
MMFT960t1 http://onsemi.com 4 information for using the sot-223 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.079 2.0 0.15 3.8 0.248 6.3 0.079 2.0 0.059 1.5 0.059 1.5 0.059 1.5 0.091 2.3 0.091 2.3 mm inches sot-223 power dissipation the power dissipation of the sot-223 is a function of the pad size. this can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. power dissipation for a surface mount device is determined by t j(max) , the maximum rated junction temperature of the die, r q ja , the thermal resistance from the device junction to ambient, and the operating temperature, t a . using the values provided on the data sheet for the sot-223 package, p d can be calculated as follows: p d = t j(max) t a r q ja the values for the equation are found in the maximum ratings table on the data sheet. substituting these values into the equation for an ambient temperature t a of 25 c, one can calculate the power dissipation of the device which in this case is 0.8 watts. p d = 150 c 25 c = 0.8 watts 156 c/w the 156 c/w for the sot-223 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 0.8 watts. there are other alternatives to achieving higher power dissipation from the sot-223 package. one is to increase the area of the collector pad. by increasing the area of the collector pad, the power dissipation can be increased. although the power dissipation can almost be doubled with this method, area is taken up on the printed circuit board which can defeat the purpose of using surface mount technology. a graph of r q ja versus collector pad area is shown in figure 9.
MMFT960t1 http://onsemi.com 5 0.8 watts 1.25 watts* 1.5 watts a, area (square inches) 0.0 0.2 0.4 0.6 0.8 1.0 160 140 120 100 80 figure 9. thermal resistance versus collector pad area for the sot-223 package (typical) board material = 0.0625 g10/fr4, 2 oz copper t a = 25 c *mounted on the dpak footprint r , thermal resistance, junction to ambient (c/w) q ja another alternative would be to use a ceramic substrate or an aluminum core board such as thermal clad . using a board material such as thermal clad, an aluminum core board, the power dissipation can be doubled using the same footprint. solder stencil guidelines prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. a solder stencil is required to screen the optimum amount of solder paste onto the footprint. the stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. the stencil opening size for the sot-223 package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference should be a maximum of 10 c. ? the soldering temperature and time should not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient should be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling * soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
MMFT960t1 http://onsemi.com 6 typical solder heating profile for any given circuit board, there will be a group of control settings that will give the desired heat pattern. the operator must set temperatures for several heating zones, and a figure for belt speed. taken together, these control settings make up a heating aprofileo for that particular circuit board. on machines controlled by a computer, the computer remembers these profiles from one operating session to the next. figure 10 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. this profile will vary among soldering systems but it is a good starting point. factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. this profile shows temperature versus time. the line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. the two profiles are based on a high density and a low density board. the vitronics smd310 convection/infrared reflow soldering system was used to generate this profile. the type of solder used was 62/36/2 tin lead silver with a melting point between 177189 c. when this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. the components on the board are then heated by conduction. the circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. step 1 preheat zone 1 arampo step 2 vent asoako step 3 heating zones 2 & 5 arampo step 4 heating zones 3 & 6 asoako step 5 heating zones 4 & 7 aspikeo step 6 vent step 7 cooling 200 c 150 c 100 c 5 c time (3 to 7 minutes total) t max solder is liquid for 40 to 80 seconds (depending on mass of assembly) 205 to 219 c peak at solder joint desired curve for low mass assemblies desired curve for high mass assemblies 100 c 150 c 160 c 170 c 140 c figure 10. typical solder heating profile
MMFT960t1 http://onsemi.com 7 package dimensions style 3: pin 1. gate 2. drain 3. source 4. drain h s f a b d g l 4 123 0.08 (0003) c m k j dim a min max min max millimeters 0.249 0.263 6.30 6.70 inches b 0.130 0.145 3.30 3.70 c 0.060 0.068 1.50 1.75 d 0.024 0.035 0.60 0.89 f 0.115 0.126 2.90 3.20 g 0.087 0.094 2.20 2.40 h 0.0008 0.0040 0.020 0.100 j 0.009 0.014 0.24 0.35 k 0.060 0.078 1.50 2.00 l 0.033 0.041 0.85 1.05 m 0 10 0 10 s 0.264 0.287 6.70 7.30 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. sot223 (to261) case 318e04 issue k
MMFT960t1 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. MMFT960t1/d thermal clad is a registered trademark of the bergquist company. north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
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